Common Base Amplifier

In the common base amplifier circuit, the common electrode is the base of the transistor, the input signal leads on the emitter and the output signal is taken from the collector. The common base circuit is shown on Picture 1. This is almost the same circuit configuration as the common emitter circuit that we already analyzed. The only difference here is the connection point of the input AC signal (with the input coupling capacitor C1) which is moved (reconnected) from the base to the emitter of the transistor Q1. Here, again we will use the simplest circuit configuration.

Picture 1: Common Base Amplifier Circuit


In general, the common base amplifier circuit has relatively small input impedance and relatively big output impedance. The voltage amplification is usually big while the current amplification is close up to 1, but it's always less than 1. Using the simplified hybrid model for the transistor for common emitter circuit (He), the following simplified expressions for voltage and circuit amplification can be found:

Av = Vo/Vi = ( hfe/hie ) * ( Rc||Rl )

Ai = Io/Ii = ( hfe/(1 + hfe + hie/Re) ) * ( Rc/(Rc + Rl) ) , --> for hfe >> 1, Rc >> Rl => Ai ~ 1

So, this circuit doesn't shift the phase of the output signal in relation to the input signal. As we can see from the Picture 1, all the components values in the common base circuit used in the LT spice simulation are the same as for the common emitter circuit. I choose the same values in order to see the differences in the responses of this circuit configuration. Just to be clear, as for the common emitter circuit, and for this circuit too, we can choose the different values for the components in order to achieve the best performance characteristics of the circuit. But, that's other problem, and depends a lot on what do you want to get from the circuit that you design. Here, the goal is to see the basic principle of operation of these circuit configurations.


Time-domain analysis

The transient analysis of the circuit was performed as non-linear time-domain simulation for the first 2 seconds from applying the power supply and input signal. The time domain wave forms of the voltage signals of input and output are shown on the Picture 2. The blue color trace is the input voltage measured right before C1 (actually, that's the Vi waveform) and the green color trace is the output voltage measured right after the C2 (actually, that's the Vo waveform - the voltage of the load Rl). These wave forms are at time moment about 620 ms after the start of the simulation. As we can see from the Picture 2, the output signal is relatively ok, there are not any visible distortions of its waveform. Also, we can see that the input and output signals are not in phase. Now, we can see more precise results from the simulation through the numbers measured in LT Spice (approximate values):

For Vi max = + 100 mV => Vo max = + 514.9 mV;
For Vi min = - 100 mV => Vo min = - 513.8 mV;

--> Av = 5 (approximate voltage amplification Av = Vo/Vi)

For Ic1 min = - 291 uA => IRl min = - 51 uA;
For IC1 max = + 291 uA => IRl max = + 51 uA;

--> Ai = 0.18 (approximate current amplification Ai = Io/Ii)

(*Ic1 is the current that flows through capacitor C1, and Irl is the current that flows through the load Rl)

Picture 2: Transient analysis - input and output voltage wave forms (time-domain)


So, according to numbers, min and max values of the output voltage signal vary for about 1 mV, which is not big value for the Vo amplitude of about 515 mV (about 0.2 % distortion). The approximate voltage amplification for this circuit configuration is about Av = 5, while the approximate current amplification is Ai = 0.18. So, Ai is less than 1, but it's not close to 1. That means that for our selected values of this circuit components we have relatively a big current attenuation (about 5, or Ii = 5 * Io), but with other values we can achieve a current amplification close to 1, if that's it what we want to achieve.


Frequency-domain analysis

The phase-frequency characteristics of this common base circuit were measured with AC analysis in LT spice. LT Spice computes the small signal AC behavior of the circuit linearized about its DC operating point. Again, in this AC simulation were used these parameters:

Type of Sweep: Octave;
Number of points per octave: 1;
Start Frequency: 20 Hz;
Stop Frequency: 10 MHz;

Picture 3: AC Analysis - output voltage [dB] and its phase [degrees] (frequency-domain)


The simulation results are shown on Picture 3. The solid green line on the graph represents the Vo[dB] and the dashed green line represents the phase of the Vo, both in frequency-domain. The maximum of the Vo is the 15.4 dB which is achieved for the frequencies above 10 kHz and phase in that cases is 0 degrees, which means that the output voltage is in phase with input voltage. Vo decreases for 3 dB (falls on 12.4 dB) at frequency of 570 Hz with phase of +52 degrees and group delay of 200 us. At frequency of 20 Hz, the magnitude of the output voltage Vo is -24.7 dB with phase of +163 degrees and group delay of 2.2 ms. Here is good to notice that for the frequency of 1 kHz, and that's it the frequency of the input signal that we used for transient analysis of the circuit, the phase of the output signal is phase shifted from the input for about +40 degrees. That explains why the voltage waveform of Vo on the Picture 2 is shifted to the left in a relation to the input voltage waveform Vi. The positive phase of +40 degrees, means a time shifting to left for about 1/9 of the period of the sinusoidal waveform (for 1 kHz the period is 1 ms, so the time shift is about 0.11 ms). That can be noticed on the Picture 2 if you look at the positive or negative peaks of the signals Vi and Vo (the Vo peaks are shifted to the left for about 0.11 ms in a relation to the Vi peaks).

So, according to the results of the AC analysis of this circuit, the low frequency limit is fl = 570 Hz.

The reduction of the amplification at low frequencies is caused by the coupling capacitors C1 and C2, while the reduction at high frequencies is caused by the parasitic capacitances of the transistor and the parallel capacitances which reconnect the signal to the ground.