Common Emitter Amplifier

One of the three base amplifier circuits with bipolar transistor is the circuit with common emitter. In this circuit, the common electrode is the emitter of the transistor, the input signal leads on the base and the output signal is taken from the collector. The common emitter circuit is shown on Picture 1. This is the simplest circuit configuration only with base elements for proper polarization of the transistor and with input signal generator and output load for simple analysis of the circuit. Actually, as shown on Picture 1, this is LT spice project. The goal here is to see the basic characteristics of the common emitter circuit and to see the possibilities that the powerful LT spice simulator provides. So, we will not use here a deep math analysis of the circuit and it's elements, since the LT spice is doing that for us. However, our goal here is to analyze the basic principles of this circuit, and to see how the basic parameters affect the circuit response.

First, let's see which are the basic elements for the proper work of this circuit. The power supply Vcc is the DC voltage source. Vcc provides static mode of work of this circuit. The resistors R1 and R2 are there to provide the proper polarization of the base of the transistor Q1, the proper "Bias Voltage". Here, the transistor Q1 is a bipolar transistor with NPN polarization. The resistor R3 is collector's resistor (it can be marked as Rc) and the resistor R4 is emitter's resistor (it can be marked as Re). That's all we need for the static mode (DC) of work. Now comes Ac mode. We have AC input voltage signal Vi which should be amplified passing through this circuit as output voltage signal Vo. Just to be clear, Vi and Vo are voltages, however, we can consider the input signal as current Ii, then the output will be considered as output current signal Io. The AC signals are passing through the capacitors C1 and C2. The input signal is provided by the sinusoidal voltage source, and it leads to the base of the Q1 through the C1. The amplified output signal is taken from the collector of the Q1, and it leads to the load Rl through the C2.

Picture 1: Common Emitter Amplifier Circuit


The response of the circuit (and all characteristics) depends on the values of all parameters, like voltage supply, resistors and capacitors values and of course, the amplifier element itself - the transistor Q1. Depending on the selected model of transistor, we should choose the proper values for the voltage supply, resistors and capacitors, in order to achieve the desired response of the circuit. The selected values of the circuit components will define the static working point of the circuit. Adjusting their values, we actually adjust the static working point of the transistor. If we want to get the maximum undistorted amplified signal on the output of the circuit, we should adjust the biasing point to the value which will provide work of the transistor only in its active region. The result will be that the transistor is always operating halfway between its cut-off and saturation regions, thereby allowing the transistor amplifier to accurately reproduce the positive and negative halves of any AC input signal superimposed upon the DC biasing voltage. In other cases, the output of the circuit will be distorted. The common emitter amplifier configuration using an NPN transistor has many applications, but is commonly used in audio circuits such as pre-amplifier and power amplifier stages. Getting the undistorted amplified signal on the output is so important in audio applications.

Anyway, here we will not go that deep in the analysis. Therefore, I choose some "casual" values of the components just to see the simulation results. For the transistor Q1 is used the basic NPN bipolar model from LT Spice library. This model is ideal bipolar NPN transistor. The DC power supply is Vcc = 12 V. The values of the resistors for bias voltage are R1 = 470K (kilo ohms) and R2 = 100K. The collector's resistor is R3 = 10K and the emitter's resistor is R4 = 470 ohms. The capacitors are C1 = 1uF (uF = micro Farad) and C2 = 0.1 uF. The load resistor is Rl = 10K. The input signal is provided by the AC voltage source with sinusoidal waveform Vi. The amplitude of the Vi is 100 mV, the frequency is f = 1 kHz and the DC offset is 0 V.


Time-domain analysis

First, the transient analysis simulation is done. The transient analysis of the circuit was performed as non-linear time-domain simulation for the first 2 seconds from applying the power supply and input signal. The time domain wave forms of the voltage signals of input and output are shown on the Picture 2. The blue color trace is the input voltage measured right before C1 (actually, that's the Vi waveform) and the green color trace is the output voltage measured right after the C2 (actually, that's the Vo waveform - the voltage of the load Rl). These waveforms are at time moment about 620 ms after the start of the simulation. As we can see from the Picture 2, the output signal is relatively ok, there are not any visible distortions of its waveform. The amplitude of the output signal is about 1 V, which means that with this circuit configuration we achieved a voltage amplification of Av = - 10. Well, if you asked yourself why the amplification has a negative value, that's because this circuit acts like phase inverter of the signal. In other words, when the input signal has positive value, the output signal has negative value, and vice versa, when input has negative value the output has positive value. This is also visible on the time-domain wave forms on the Picture 2 (when input signal has positive peak, the output signal has negative peak, and vice versa). So, these are the visible results from the plot. Now, we can see more precise results from the simulation through the numbers measured in LT Spice (approximate values):

For Vi max = + 100 mV => Vo min = - 993,830 mV;
For Vi min = - 100 mV => Vo max = + 989,596 mV;

--> Av = - 10 (approximate voltage amplification Av = Vo/Vi)

For Ic1 min = - 3.2 uA => IRl max = + 99.1 uA;
For IC1 max = + 3.6 uA => IRl min = - 99.3 uA;

--> Ai = - 30 (approximate current amplification Ai = Io/Ii)

(*Ic1 is the current that flows through capacitor C1, and Irl is the current that flows through the load Rl)

Picture 2: Transient analysis - input and output voltage wave forms (time-domain)


The minimum value of the Vo measured is bigger than maximum for about 4 mV, which is not a very big distortion for a 1V amplitude sinusoidal signal (about 0.4 % distortion). This means that when positive half period is present in the output signal, The transistor reach its limit of the normal active region a little bit faster than when negative half-period is present, and it can't reach the same max value as for negative half-period, but the difference is small, so we can say that the static mode of operation of this circuit is relatively well adjusted (for AC small signals with amplitudes up to 100 mV). Also, from the values that we got from the simulation results for this common emitter circuit configuration the calculated values for amplification are about Av = - 10 (for voltage) and Ai = - 30 (for current).


The amplification

The voltage amplification Av is defined as ratio between the output and input voltage Av = Vo/Vi.
The current amplification Ai is defined as ratio between the output and input current Ai = Io/Ii.

In most practical cases, especially for the initial behavioral assessment of the transistors amplifiers, can be applied a simplified model for the transistor taking into account only two of the h-parameters: hie and hfe, so allowing error no greater than 10% for voltage and circuit amplification can be found following simplified expressions:

Av = Vo/Vi = - (hfe/hie)*(Rc||Rl)

Ai = Io/Ii = (Vo/Rl)/(Vi/Ri) ,

where:

hfe - the current gain of the transistor;
hie - the input impedance of the transistor (corresponding to the base resistance);
Rc||Rl = (Rc*Rl)/(Rc+Rl) - parallel resistance of the collector's resistance (Rc, in our case R3) and load resistance (Rl);
Ri - input impendance of the circuit (Ri = Rth||hie, where Rth is the equivalent Thévenin's resistance of the circuit, looking from its input - this equivalent resistance Rth is the resistance obtained at terminals A-B of the network with all its independent current sources open circuited and all its independent voltage sources short circuited - in our case terminal A is the input point of the circuit - electrode of the C1 and terminal B is the ground);

The amplification depends on the frequency of the input signal. That dependence can be expressed as:

A = A(jw), where j is imaginary unit and w is circular frequency w = 2*Pi*f (Pi = 3.14)

At low and high frequencies the amplification is less than the amplification Ao at middle frequencies. The frequencies where it falls to value 0.707 (or, it decreases for 3 dB) from the value at middle frequencies, are called lower (fL) and upper (fH) frequency limits.


Frequency-domain analysis

The phase-frequency characteristics of this common emitter circuit were measured with AC analysis in LT spice. LT Spice computes the small signal AC behavior of the circuit linearized about its DC operating point. In this AC simulation were used these parameters:

Type of Sweep: Octave;
Number of points per octave: 1;
Start Frequency: 20 Hz;
Stop Frequency: 10 MHz;

Picture 3: AC Analysis - output voltage [dB] and its phase [degrees] (frequency-domain)


The simulation results are shown on Picture 3. The solid green line on the graph represents the Vo[dB] and the dashed green line represents the phase of the Vo, both in frequency-domain. The maximum of the Vo is the 20 dB which is achieved for the frequencies above 10 kHz and phase in that cases is -180 degrees. Vo decreases for 3 dB (falls on 17 dB) at frequency of 83 Hz with phase of -132 degrees and group delay of 1.2 ms. At frequency of 20 Hz, the magnitude of the output voltage Vo is 7.5 dB with phase of -90 degrees and group delay of 3.1 ms.

So, according to the results of the AC analysis of this circuit, the low frequency limit is fl = 83 Hz. Also, there is no high frequency limit for this circuit and that's because we used ideal model of transistor in this simulation. If we choose a real model transistor, then the output voltage/amplification will declines and for high frequencies too.

The reduction of the amplification at low frequencies is caused by the coupling capacitors C1 and C2, while the reduction at high frequencies is caused by the parasitic capacitances of the transistor and the parallel capacitances which reconnect the signal to the ground. At high frequencies special transistor models are used, like, for example, the Pi-hybrid model of transistor.